Step 2 -look at the circuit The path look like this is the logic which having a large dela owbip(LC4_J35 ROWFP Cs[9. QC..王3 CLEAR bBRA Copyright 1997 Altera Corporation 9/12/97
Copyright © 1997 Altera Corporation 9/12/97 Step 2 - look at the circuit The path look like this is the logic which having a large delay
Step 3 -look at the module BEGIN IF clear'1 THEN cnt<=l ELSE IF rowip='1 THEN IF cnt=9 THEN OUTPUT DEPEND ON THE ELSE COUNTER COUNTER cnt<=cnt+1 VALUE END IF. END IF END IF CASE cnt Is WHEN 1=>cs<="000000°; WHEN2=>cs<="0000010; WHEN3=>cs<="000000100 WHEN4=>cs<="000001000"; WHEN5=>cs<="000010000" WHEN6=>cs<="000100000 WHEN7=>cs<="00100000 Big combinational logic cause a big dElay WHEN8=>cs<="010000000 WHEN9=>cs<="100000000 WHEN OTHERS=>CS<=000000000 END CASE Copyright 1997 Altera Corporation 9/12/97
Copyright © 1997 Altera Corporation 9/12/97 Step 3 - look at the module BEGIN IF clear='1' THEN cnt<=1; ELSE IF rowfp='1' THEN IF cnt=9 THEN cnt<=1; ELSE cnt<=cnt+1; END IF; END IF; END IF; CASE cnt IS WHEN 1 => cs<="000000001"; WHEN 2 =>cs<="000000010"; WHEN 3 =>cs<="000000100"; WHEN 4 =>cs<="000001000"; WHEN 5 =>cs<="000010000"; WHEN 6 =>cs<="000100000"; WHEN 7 =>cs<="001000000"; WHEN 8 =>cs<="010000000"; WHEN 9 =>cs<="100000000"; WHEN OTHERS =>cs<="000000000"; END CASE; DFF OUTPUT DEPENDS ON THE COUNTER VALUE DFF Big combinational logic cause a big DELAY COUNTER DFF
Step 4-Modify the Source Code BEGIN IF clearI THEN cnt<=l ELSE IF (rowfp'event and rowfp=I") THEN IF cnt=9 THEN ELSE cnt<=cnt+I TIPUT END IF- DEPENDS END IF DFF COUNTER ON THE DFF END IF ANC COUNTER CASE cnt Is When 9=>csnode<=000000001 WHEN I =>csnode<=000000010 WHEN 2 =>csnode<="000000100" WhEn 3 =>csnode<="000001000 WHEN 4 =>csnode<="000010000" WHEN 5=>csnode<=000100000 WHEN 6=>csnode<=001000000 WHEN 7=>csnode<=010000000 HEN8= anode<="100000000 HEN OTHERS =>csnode<=000000000 END CASE Output depends on the END PROCESS. process(rowfp, csnode ADVANCE counter Add an extra dFe if (rowfp'event and rowtp=I') then value cs<= csnode- end if Copyright 1997 Altera Corporation 9/12/97
Copyright © 1997 Altera Corporation 9/12/97 Step 4 - Modify the Source Code BEGIN IF clear='1' THEN cnt<=1; ELSE IF (rowfp'event and rowfp='1') THEN IF cnt=9 THEN cnt<=1; ELSE cnt<=cnt+1; END IF; END IF; END IF; CASE cnt IS WHEN 9 =>csnode<="000000001"; WHEN 1 =>csnode<="000000010"; WHEN 2 =>csnode<="000000100"; WHEN 3 =>csnode<="000001000"; WHEN 4 =>csnode<="000010000"; WHEN 5 =>csnode<="000100000"; WHEN 6 =>csnode<="001000000"; WHEN 7 =>csnode<="010000000"; WHEN 8 =>csnode<="100000000"; WHEN OTHERS =>csnode<="000000000"; END CASE; END PROCESS; process(rowfp,csnode) begin if (rowfp'event and rowfp='1') then cs <= csnode; end if; end process; DFF COUNTER DFF OUTPUT DEPENDS ON THE ADVANCE COUNTER VALUE DFF DFF Add an extra DFF Output depends on the ADVANCEcounter value
Compare the Two source code BEGIN BEGIN IF clearI THEN IF clear1 THEN cnt<=l ELSE IF(rowfp'event and rowfp=I)THEN IF cnt=9 THEN IF rowip='I"THEN IF cnt=9 THEN ELSE cnt<=cnt+1 END IF ELSE cnt<=cnt+1 CASE cnt IS END IF when 9=>csnode<="00000000 1 END F WHEN I =>csnode<="000000010" WHEN 2 =>csnode<="000000100 END IF WhEn 3 =>csnode<="000001000 CASE cnt Is WHEN 4 =>csnode<="000010000 WHEN1=>cs<="000000001" WHEN 6=>csnode<="001000000" WHEN2=>cs<="000000010 WHEN7= anode<=”0l0000000° WHEN3=>cs<="000000100 When 8=>csnode<="100000000 WHEN4=>cs<="000000 WHEN OTHERS =>csnode<="000000000 END CAS WHEN5=>cs<="000010000"; END PROCESS WHEN6=>cs<="000100000"; process(rowip, csnode) WHEN7=>cs<="001000000 WHEN8=>cs<="010000000 if (rowip'event and rowip='I)then WHEN9=>cs<="100000000 cs <= anode WHEN OTHERS =>CS<=000000000 end正f Copyright+合 corporation 9/12/97 Functional exactly the same
Copyright © 1997 Altera Corporation 9/12/97 Compare the Two source code BEGIN IF clear='1' THEN cnt<=1; ELSE IF rowfp='1' THEN IF cnt=9 THEN cnt<=1; ELSE cnt<=cnt+1; END IF; END IF; END IF; CASE cnt IS WHEN 1 => cs<="000000001"; WHEN 2 =>cs<="000000010"; WHEN 3 =>cs<="000000100"; WHEN 4 =>cs<="000001000"; WHEN 5 =>cs<="000010000"; WHEN 6 =>cs<="000100000"; WHEN 7 =>cs<="001000000"; WHEN 8 =>cs<="010000000"; WHEN 9 =>cs<="100000000"; WHEN OTHERS =>cs<="000000000"; END CASE; BEGIN IF clear='1' THEN cnt<=1; ELSE IF (rowfp'event and rowfp='1') THEN IF cnt=9 THEN cnt<=1; ELSE cnt<=cnt+1; END IF; END IF; END IF; CASE cnt IS WHEN 9 =>csnode<="000000001"; WHEN 1 =>csnode<="000000010"; WHEN 2 =>csnode<="000000100"; WHEN 3 =>csnode<="000001000"; WHEN 4 =>csnode<="000010000"; WHEN 5 =>csnode<="000100000"; WHEN 6 =>csnode<="001000000"; WHEN 7 =>csnode<="010000000"; WHEN 8 =>csnode<="100000000"; WHEN OTHERS =>csnode<="000000000"; END CASE; END PROCESS; process(rowfp,csnode) begin if (rowfp'event and rowfp='1') then cs <= csnode; end if; end process; Functional exactly the same
Compare the stand alone module 口区 区 Registered Performance Registered Performance Clock: 2Q (10 paths) ource Source: lclum9. 8)cnt3. Q Destination: " 67.0 Destination: lclum9. 8cnt3Q 160 Clock period 9 Frequency: 107. 52MHz Clock period: 8.7ns Frequency: 114.94MHz Start Stop List Paths Start List Paths bBRA Copyright 1997 Altera Corporation 9/12/97
Copyright © 1997 Altera Corporation 9/12/97 Compare the stand alone module