Chapter 2 Organization of Computers 2.1.1 System Buses A system may have a hierarchy of buses. For example, it may use its address, data, and control buses to access memory, and an 1/O controller. The I/O controller, in turn, may access all I/o devices using a second bus. often called an l/o bus or a local bus 个系统可能具有分层次的总线。例如,它可能使用地址、数 据和控制总线来访问存储器和JO控制器。IO控制器可能依次 使用第二级总线来访问所有的O设备,第二级总线通常称为 IO总线或者局部总线。 计算机专业英语 211
Chapter 2 Organization of Computers 计算机专业英语 2-11 A system may have a hierarchy of buses. For example, it may use its address, data, and control buses to access memory, and an I/O controller. The I/O controller, in turn, may access all I/O devices using a second bus, often called an I/O bus or a local bus. 一个系统可能具有分层次的总线。例如，它可能使用地址、数 据和控制总线来访问存储器和I/O控制器。I/O控制器可能依次 使用第二级总线来访问所有的I/O设备，第二级总线通常称为 I/O总线或者局部总线。 2.1.1 System Buses
Chapter 2 Organization of Computers 2.1.2 Instruction Cycle The instruction cycle is the procedure a microprocessor goes through to process an instruction. First the microprocessor fetches, or reads, the instruction from memory. Then it decodes the instruction, determining which instruction it has fetched. Finally, it performs the operations necessary to execute the instruction (Some people also include an additional element in the instruction cycle to store results. Here, we include that operation as part of the execute function. ) Each of hese functions--fetch, decode, and execute--consists of a sequence of one or more operations 指令周期是徼处理器完成一条指令处理的步骤。首先,微处理器从存储器读 取指令,然后将指令译码,辩明它取的是哪一条指令。最后,它完成必要的 操作来执行指令(有人认为在指令周期中还要包括一个附加的步骤来存储结 果,这里我们把该操作当作执行功能的一部分)。每一个功能读取、译 码和执行都包括一个或多个操作 计算机专业英语 2-12
Chapter 2 Organization of Computers 计算机专业英语 2-12 The instruction cycle is the procedure a microprocessor goes through to process an instruction. First the microprocessor fetches, or reads, the instruction from memory. Then it decodes the instruction, determining which instruction it has fetched. Finally, it performs the operations necessary to execute the instruction. (Some people also include an additional element in the instruction cycle to store results. Here, we include that operation as part of the execute function.) Each of these functions--fetch, decode, and execute--consists of a sequence of one or more operations. 指令周期是微处理器完成一条指令处理的步骤。首先，微处理器从存储器读 取指令，然后将指令译码，辩明它取的是哪一条指令。最后，它完成必要的 操作来执行指令（有人认为在指令周期中还要包括一个附加的步骤来存储结 果，这里我们把该操作当作执行功能的一部分）。每一个功能——读取、译 码和执行都包括一个或多个操作。 2.1.2 Instruction Cycle
Chapter 2 Organization of Computers 2.1.2 Instruction Cycle Let's start where the computer starts, with the microprocessor fetching the instruction from memory. First, the microprocessor places the address of the instruction on to the address bus. The memory subsystem inputs this address and decodes it to access the sired memory location. (We look at how this decoding occurs when we examine the memory subsystem in more detail later in this chapter) 我们从微处理器从存储器中取指令开始讲述。首先,微处理器 把指令的地址放到地址总线上,然后,存储器子系统从总线上 输入该地址并予以译码,去访问指定的存储单元。(译码是如 何进行的,我们将在后面的章节中介绍存储器子系统是更为详 细的讨论。) 计算机专业英语 2-13
Chapter 2 Organization of Computers 计算机专业英语 2-13 Let's start where the computer starts, with the microprocessor fetching the instruction from memory. First, the microprocessor places the address of the instruction on to the address bus. The memory subsystem inputs this address and decodes it to access the sired memory location. (We look at how this decoding occurs when we examine the memory subsystem in more detail later in this chapter.) 我们从微处理器从存储器中取指令开始讲述。首先，微处理器 把指令的地址放到地址总线上，然后，存储器子系统从总线上 输入该地址并予以译码，去访问指定的存储单元。（译码是如 何进行的，我们将在后面的章节中介绍存储器子系统是更为详 细的讨论。） 2.1.2 Instruction Cycle
Chapter 2 Organization of Computers 2.1.2 Instruction Cycle After the microprocessor allows sufficient time for memory to decode the address and access the requested memory location, the microprocessor asserts a READ control signal. The READ signal is a signal on the control bus which the microprocessor asserts when it is ready to read data from memory or an l/o device. ( Some processors have a different name for this signal, but all microprocessors have a signal to perform this function. ) Depending on the microprocessor, the READ signal may be active high(asserted -1)or active low (asserted -0) 当微处理器为存储器留出充足的时间来对地址译码和访问所需的存储单元之 后,微处理器发出一个读(READ)控制信号。当微处理器准备好可以从存 储器或是O设备读数据时,它就在控制总线上发一个读信号。(一些处理器 对于这个信号有不同的名字,但所有处理器都有这样的信号来执行这个功 能。)根据微处理器的不同,读信号可能是高电平有效(信号=1),也可能 是低电平有效(信号=0) 计算机专业英语 2-14
Chapter 2 Organization of Computers 计算机专业英语 2-14 After the microprocessor allows sufficient time for memory to decode the address and access the requested memory location, the microprocessor asserts a READ control signal. The READ signal is a signal on the control bus which the microprocessor asserts when it is ready to read data from memory or an I/O device. (Some processors have a different name for this signal, but all microprocessors have a signal to perform this function.) Depending on the microprocessor, the READ signal may be active high (asserted - 1) or active low (asserted - 0). 当微处理器为存储器留出充足的时间来对地址译码和访问所需的存储单元之 后，微处理器发出一个读（READ）控制信号。当微处理器准备好可以从存 储器或是I/O设备读数据时，它就在控制总线上发一个读信号。（一些处理器 对于这个信号有不同的名字，但所有处理器都有这样的信号来执行这个功 能。）根据微处理器的不同，读信号可能是高电平有效（信号=1），也可能 是低电平有效（信号=0）。 2.1.2 Instruction Cycle
Chapter 2 Organization of Computers 2.1.2 Instruction Cvcle When the READ signal is asserted, the memory subsystem places stores it in one of its internal registers. At this poin, the ous ane ata the instruction code to be fetched onto the computer system' s d bus. The microprocessor then inputs this data from the b microprocessor has fetched the instruction 读信号发出后,存储器子系统就把要取的指令码放到计算机的 数据总线上,微处理器就从数据总线上输入该数据并且将它存 储在其内部的某个寄存器中。至此,微处理器已经取得了指令。 计算机专业英语 2-15
Chapter 2 Organization of Computers 计算机专业英语 2-15 When the READ signal is asserted, the memory subsystem places the instruction code to be fetched onto the computer system's data bus, The microprocessor then inputs this data from the bus and stores it in one of its internal registers. At this point, the microprocessor has fetched the instruction. 读信号发出后，存储器子系统就把要取的指令码放到计算机的 数据总线上，微处理器就从数据总线上输入该数据并且将它存 储在其内部的某个寄存器中。至此，微处理器已经取得了指令。 2.1.2 Instruction Cycle